The chip design faces many challenges, but how to solve the problem of IP reuse and integration?

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2022-03-17 18:45:46 85

The strong demand for semiconductor chips in the fields of automobile, artificial intelligence (AI), data processing and intelligent terminals is accelerating the development of semiconductor industry, and it is expected to surge to 808.5 billion USD by 2030. PricewaterhouseCoopers predicts that in 2022, the revenue of AI-related semiconductor market alone will increase to more than 30 billion USD, with an annual growth rate of 50%.

At the same time, semiconductor chips have become smaller, faster and more powerful, and their flexibility and functionality have been significantly improved. However, as the design becomes more and more complex, the demand for verification capability and next generation verification technology is also increasing. Functional safety compliance, which depends on full traceability and strict document flow, is becoming more and more important. Semiconductor companies are increasingly adopting IP reuse design schemes to shorten the time to market and comply with regulations. Adopting more complex methods to promote design and reuse will change business and improve R&D efficiency by at least 20%.

Due to the global supply chain problem and the explosive growth of chip demand, the semiconductor industry has entered a large-scale commercialization, and the market competition continues to intensify. Recently, the United States is encouraging semiconductor chip manufacturing through legislation to further promote the development of semiconductor market. With the application of semiconductor chips gradually expanding to more new application fields, this trend will continue in the next few years.

Time-to-market pressure and effective reuse of IP are the two most important problems faced by semiconductor companies, and these problems are closely related. Although IP reuse is an effective way to speed up the time to market, enterprises need to implement standard IP reuse strategies. The lack of standard reuse strategies, processes and supporting tools has seriously hindered the growth of chip design productivity. The fact that chip design capability is increasing rapidly complicates the situation. According to a recent study by the University of Michigan, the productivity of chip design is increasing at an annual rate of 28%, but the productivity of semiconductor is growing faster, with an annual growth rate of 58%.

This productivity gap follows the trend of increasing commercialization of semiconductors, which requires enterprises to maintain a certain profit margin under fierce competition. The standard IP reuse strategy is becoming a necessary condition to meet the time-to-market demand and narrow the gap between design capability and design productivity.

Compliance and compliance management

Semiconductor companies are increasingly required to meet ISO 26262, ITAR and other compliance/functional safety standards. This is understandable, because many markets that promote the growth of semiconductors are consumer-oriented applications. As more and more semiconductor companies supply regulated industries, they will need to prove that their products can meet the safety requirements. A suite of design and implementation tools that can automate and ensure the traceability of chip design is essential to meet the strict compliance process.

At present, most semiconductor companies still say that they are using manual processes for compliance management, and lack of automated management. This method is only suitable for small-scale management, but with the expansion of enterprise scale, it may become more and more difficult to manage various compliance levels. Adopting a platform approach to achieve compliance can provide the team with a holistic view, making it easier to comply with standards. Although there are few tools to provide automation in this field, it seems that automation is needed around the compliance requirements of these standards. The platform can be used to track and summarize the compliance level of various single-point tools in their specific application scenarios.

Embedded system and IP integration

It is estimated that by 2027, the global embedded system market will grow by 6.3%, reaching USD 137.31 billion. Embedded software is becoming an important part of many products, and more and more products integrate hardware and software. This will make the chip design more complicated, which requires the cooperation between hardware designers and software developers.

With the blurring of the boundary between hardware and software, enterprises will need to manage their design life cycle in a unified and clear way. Configuration is important to deal with the correlation between hardware and software components, and it can enable traceability and a single source of facts for the component versions in the design.

In a typical chip, more than 40% of the chips are made of custom IC. In order to speed up the design of complex mixed-signal SoC, the reuse of analog components is becoming more and more common. In other words, more and more analog circuits are being integrated into SoC. Most enterprises say that chip design increasingly needs to integrate new or existing IP. This strongly demonstrates the importance of IP-based component design in today's semiconductor industry. Reusing IP components can help the team spend less time on integration. Comprehensive IP lifecycle management can provide designers with a high-quality platform to find, identify and integrate IP, thus simplifying IP integration and chip design.

In addition, the application scale of 2.5D design is gradually increasing. Many enterprises have indicated that they have applied or are considering adopting 2.5D design for their products. With the slowdown of Moore's Law, in order to maintain the SoC integration level, 2.5D design has gradually become the trend of market development.

Challenges in Chip Design

Chip design is becoming more and more complex, and the global semiconductor supply chain problem can not be alleviated, which has caused a certain impact on the time to market and profit of semiconductor enterprises. Enterprises are faced with numerous obstacles when trying to maintain their competitive advantage.

Finding relevant IP that can be reused is a challenge. At present, the practice of semiconductor companies is to reuse the IP in previous projects or search through the IP directory of the company. Although this method is effective, it can't produce the best IP for the project at hand. In order to improve design productivity and better design semiconductor chip products, enterprises need to seek a more standard and data-based method to realize IP reuse.

Designers say that it takes at least one day or more to find the relevant IP for their design because it is difficult to find the appropriate IP. Then, the designer needs to certify the IP and incorporate it into the design. However, in order to meet the increasing demand of design, designers simply can't spend a day or even longer searching. Therefore, it will be a development direction to load the metadata of various qualification authentication tools in the design ecosystem into IP directory and catalogue IP. This scheme helps to organize and speed up the integration process, and can also be used to determine the status and quality of IP. At the same time, in order to better classify IP, the team needs a comprehensive platform to help designers find the status of IP to optimize the search process, continuously promote IP reuse and shorten the time to market.

In addition, tracking and determining the quality of IP is very important for traceability. The process by which designers determine whether the requirements are met by reviewing the supporting evidence in the design process, and track the usage of IP in various projects throughout the enterprise. Having an IP platform that meets the requirements and usage scenarios can provide the team with information about IP health, which is helpful for better application in future projects.

Chip design tools trusted by industry leaders

For semiconductor enterprises, with the continuous development of chip design, there are higher requirements for infrastructure tools for design and development. Among them, IP management, data management/version control, product life cycle management (PLM), requirement management, static code analysis, etc. are all essential tool chain software for semiconductor enterprises. In addition, many enterprises have further adopted chip design tools such as command line and GUI-based tools, multi-vendor preference and cloud organization architecture.

IP management

Although more and more enterprises take IP as the core for chip design, the adoption of commercial IP lifecycle platform is still at an early stage. IP lifecycle management tools provide the foundation for collaboration, helping to ensure traceability and speed time to market. Designers can view products using IP and learn about errors, derivative designs, regression status, etc. This information saves search time and minimizes unforeseen risks, while helping the team to quality, distribute and integrate IP.

Data management/version control

Data management and version control solutions come from the development field. This scheme can be traced back to the early stage of the company, and provides a pillar for IP management. Having a data management solution can support IP tracking, provide engineers with powerful metadata needed for decision-making, and contribute to the collaboration of global teams.

summary

The development of semiconductor industry is changing with each passing day, and the increasingly vigorous market demand has brought more challenges to semiconductor enterprises, and at the same time, it has also ushered in new opportunities for technological and industrial development. As the chip design becomes more and more complex, the technical team needs to innovate and iterate faster. Enterprises must deliver the market demand on time and narrow the gap between design capability and design productivity.

With the increasing requirements for compliance or functional safety standards of semiconductor products, traceability has become a major challenge. The standard IP reuse strategy is very important to make full use of your IP investment. An effective IP management platform can help designers find, authenticate and manage IP versions. Using such platform management IP can be reused throughout the project, enabling enterprises to speed up time to market and maintain profits without sacrificing security or traceability. This research shows that the advantages of IP-centric design method can be maximized by using the right management tools. At the same time, tool suppliers also have the opportunity to open up potential application markets for these tools.

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The chip design faces many challenges, but how to solve the problem of IP reuse and integration?

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