ASML targets Hyper-NA EUV to push chip design limits

Industry Trends|Industry Trends|

2024-09-02 17:28:51 709

ASML has announced plans for a new type of photolithography tool called "Hyper-NA," which aims to push the limits of high transistor density chip design. According to former ASML*Martin van den Brink, the global research organization Imec has confirmed that the Hyper-NA EUV technology is in early development stages. Intel has already installed a Hyper-NA system at its Oregon semiconductor plant. The new technology will increase numerical aperture (NA) from 0.33 to 0.55, with a goal to reach 0.75 NA by 2030. This advancement will support process nodes beyond 2 nm over the next decade.

Imec’s Kurt Ronse highlighted that Hyper-NA EUV is a significant step, with ongoing research aiming for NA beyond 0.55, targeting 0.85 NA. Challenges include light polarization, which impacts contrast and efficiency. ASML remains the sole manufacturer of EUV tools for high-density transistors, serving major clients like TSMC, NVIDIA, Apple, and AMD.

Intel's recent installation of Hyper-NA systems enhances resolution and functionality, potentially matching TSMC’s 2 nm process. Samsung, Micron, and SK Hynix are also exploring Hyper-NA technology. Hyper-NA is expected to reduce costs and complexity associated with double patterning. Alternatives like nanoimprint lithography have lower throughput, and multi-beam electron beam lithography faces challenges.

In addition to photolithography, further miniaturization of transistors is approaching physical limits. New materials with higher electron mobility are needed to replace silicon, posing deposition and etching challenges. Despite these advances, silicon will remain fundamental, with new materials enhancing specific layers.
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ASML targets Hyper-NA EUV to push chip design limits

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